Using carry-save adders in low-power multiplier blocks

For a simple multiplier block FIR filter design, we compare the effects on power consumption of using direct versus transposed direct forms, tree versus linear structures and carry-save (CS) versus carry-ripple (CR) adders (for which multiplier block algorithms have been designed). We find that tree structures offer power savings, as expected, as does transposition in general but not always. Selective use of CS adders is shown to offer power savings provided that care is taken with their deployment. Our best result is with a direct form CWCS hybrid. The need for new multiplier-block design algorithms is identified

Efficient implementation of digital filters using novel reconfiguaration multiplier blocks (REMB)

Reconfigurable Multiplier Blocks (ReMB) offer significant complexity reductions in multiple constant multiplications in time-multiplexed digital filters. In this paper the ReMB technique is employed in the implementation of a half-band 32-tap FIR filter on both Xilinx Virtex FPGA and UMC 0.18micro m CMOS technologies. Reference designs have also been built by deploying standard time-multiplexed architectures and off-the-shelf Xilinx Core Generator system for the FPGA design. All designs are then compared for their area and delay figures. It is shown that, the ReMB technique can significantly reduce the area for the multiplier circuitry and the coefficient store, as well as reducing the delay

Synthesis of reconfigurable multiplier blocks: part II: algorithm

Reconfigurable Multiplier Blocks (ReMB) offer significant area, delay and possibly power reduction in time-multiplexed implementation of multiple constant multiplications. This paper and its companion paper (entitled Part I- Fundamentals) together present a systematic synthesis method for Single Input Single Output (SISO) and Single Input Multiple Output (SIMO) ReMB designs. This paper illustrates the synthesis method through examples. The companion paper presents the necessary foundation and terminology needed for developing a systematic synthesis technique. The proposed method achieves reduced logic-depth and area over standard multipliers / multiplier blocks

Efficient implementation of digital filters using novel reconfiguaration multiplier blocks (REMB)

Reconfigurable Multiplier Blocks (ReMB) offer significant complexity reductions in multiple constant multiplications in time-multiplexed digital filters. In this paper the ReMB technique is employed in the implementation of a half-band 32-tap FIR filter on both Xilinx Virtex FPGA and UMC 0.18micro m CMOS technologies. Reference designs have also been built by deploying standard time-multiplexed architectures and off-the-shelf Xilinx Core Generator system for the FPGA design. All designs are then compared for their area and delay figures. It is shown that, the ReMB technique can significantly reduce the area for the multiplier circuitry and the coefficient store, as well as reducing the delay

Adaptive Gray World-Based Color Normalization of Thin Blood Film Images

This paper presents an effective color normalization method for thin blood film images of peripheral blood specimens. Thin blood film images can easily be separated to foreground (cell) and background (plasma) parts. The color of the plasma region is used to estimate and reduce the differences arising from different illumination conditions. A second stage nor- malization based on the database-gray world algorithm trans- forms the color of the foreground objects to match a reference color character. The quantitative experiments demonstrate the effectiveness of the method and its advantages against two other general purpose color correction methods: simple gray world and Retinex

Synthesis of reconfigurable multiplier blocks: part I: fundamentals

Reconfigurable Multiplier Blocks (ReMB) offer significant area, delay and possibly power reduction in time multiplexed implementation of multiple constant multiplications. This paper and its companion paper (subtitled Part II- Algorithm) together present a systematic synthesis method for Single Input Single Output (SISO) and Single Input Multiple Output (SIMO) ReMB designs. This paper presents the necessary foundation and terminology needed for developing a systematic synthesis technique. The companion paper illustrates the synthesis method through examples. The method proposed achieves reduced logic-depth and area over standard multipliers / multiplier blocks

Design guidelines for reconfigurable multiplier blocks

The newly proposed reconfigurable multiplier blocks offer significant savings in area over the traditional multiplier blocks for time-multiplexed digital filters or any other system where only a subset of the coefficients that can be produced by the multiplier block is needed in a given time. The basic structure comprises a multiplexer connected to at least one input of an adder/subtractor that can generate several partial products, leading to better area utilization. The multiplier block algorithm complexity of a design increases logarithmically as the number of the multiplexers is increased. Design guidelines for the maximum utilization of the reconfigurable multiplier block structures are also presented

A colour normalization method for giemsa-stained blood cell images

This paper presents a novel method for the colour normalization of Giemsa-stained peripheral blood cell images. The normalization is applied separately to the foreground and background regions. A rough estimation of the foreground-background regions is done by mathematical morphology and followed by a refined segmentation using histograms of these regions. Then an illumination independent response is calculated using the background region. The normalization is completed by transforming the foreground region according to a reference set. The proposed method has been tested on many images and has been found successful

Computer vision for microscopy diagnosis of malaria

This paper reviews computer vision and image analysis studies aiming at automated diagnosis or screening of malaria infection in microscope images of thin blood film smears. Existing works interpret the diagnosis problem differently or propose partial solutions to the problem. A critique of these works is furnished. In addition, a general pattern recognition framework to perform diagnosis, which includes image acquisition, pre-processing, segmentation, and pattern classification components, is described. The open problems are addressed and a perspective of the future work for realization of automated microscopy diagnosis of malaria is provided

Reconfigurable implementation of recursive DCT kernels for reduced quantization noise

Time multiplexed implementations of the recursive DCT processors are widely used in many multimedia and compression applications. Recently proposed three Goertzel kernels offer significant improvement (up to 90 %) in the noise performance of the time-multiplexed architecture to allow word-length specifications get reduced. In this paper, a highly optimized reconfigurable DCT architecture is proposed that can perform the function of three different kemels (Type A, B and C) on Virtex FPG